#! /usr/bin/make

# Designed to be run one level up
wire-wrongdir:
	$(MAKE) -C .. wire-all

WIRE_HEADERS := wire/wire.h
WIRE_GEN_HEADERS := wire/gen_peer_wire.h
WIRE_GEN_SRC := wire/gen_peer_wire.c
WIRE_SRC := wire/fromwire.c	\
		wire/towire.c

WIRE_OBJS := $(WIRE_SRC:.c=.o) $(WIRE_GEN_SRC:.c=.o)

# They may not have the bolts.
BOLT_EXTRACT=$(BOLTDIR)/tools/extract-formats.py
wire/gen_peer_wire_csv: FORCE
	@set -e; if [ -f $(BOLT_EXTRACT) ]; then for f in $(BOLTDIR)/*.md $(BOLT_EXTRACT); do if [ $$f -nt $@ -o ! -f $@ ]; then $(BOLT_EXTRACT) --message-fields --message-types --check-alignment $(BOLTDIR)/*.md > $@; break; fi; done; fi

wire/gen_peer_wire.h: $(WIRE_GEN) wire/gen_peer_wire_csv
	$(WIRE_GEN) --header $@ wire_type < wire/gen_peer_wire_csv > $@

wire/gen_peer_wire.c: $(WIRE_GEN) wire/gen_peer_wire_csv
	$(WIRE_GEN) ${@:.c=.h} wire_type < wire/gen_peer_wire_csv > $@

wire/gen_peer_wire.o: wire/gen_peer_wire.h

check-source: $(WIRE_SRC:%=check-src-include-order/%) $(WIRE_HEADERS:%=check-hdr-include-order/%)

check-source-bolt: $(WIRE_SRC:%=bolt-check/%) $(WIRE_HEADERS:%=bolt-check/%)

check-whitespace: $(WIRE_SRC:%=check-whitespace/%) $(WIRE_HEADERS:%=check-whitespace/%) check-whitespace/wire/Makefile

clean: wire-clean

wire-all: wire/gen_peer_wire.o wire/fromwire.o wire/towire.o

wire-clean:
	$(RM) $(WIRE_OBJS) $(WIRE_GEN_SRC) $(WIRE_GEN_HEADERS) towire.c fromwire.c

include wire/test/Makefile